Raghunath Murali

Journal Publications

R. Murali, K. Brenner, Y. Yang, T. Beck, J.D. Meindl, “Resistivity of Graphene Nanoribbon Interconnects,” accepted for publication in IEEE Electron Device Letters.

C. Tabor, R. Murali, M. Mahmoud, M. El-Sayed, “On the use of plasmonic nanoparticle pairs as a plasmon ruler: The dependence of the near-field dipole plasmon coupling on nanoparticle size and shape,” Journal of Physical Chemistry A 2009, 113, 1946-1953.

The localized surface plasmon resonance (LSPR) spectral band of a gold or silver nanoparticle is observed to shift as a result of the near-field plasmonic field of another nanoparticle. The dependence of the observed shift on the interparticle distance is used as a ruler in biological systems and gave rise to a plasmonic ruler equation in which the fractional shift in the dipole resonance is found to decrease near exponentially with the interparticle separation in units of the particle size. The exponential decay length constant was observed to be consistent among a small range of nanoparticle sizes, shapes, and types of metal. The equation was derived from the observed results on disks and spherical nanoparticles and confirmed using results on a DNA conjugated nanosphere system. The aim of the present paper is to use electron beam lithography and DDA calculations to examine the constancy of the exponential decay length value in the plasmonic ruler equation on particle size and shape of a number of particles including nanoparticles of different symmetry and orientations. The results suggest that the exponent is almost independent of the size of the nanoparticle but very sensitive to the shape. A discussion of the nanoparticles most suitable for different applications in biological systems and a comparison of the plasmonic ruler with Forster resonance energy transfer (FRET) is mentioned.

R. Murali, “Mitigation of Microloading Effect in Nanoimprint Mask Fabrication,” Journal of Vacuum Science and Technology B, vol. 26, no. 1, pp. 167-9, Jan. 2009.

The impact of microloading on photomask etch has been widely studied in the last decade; microloading results in differing etch depths for different pattern resolution and densities. Techniques used to reduce microloading in photomask etch cannot always be directly extended to nanoimprint masks. In nanoimprint mask fabrication, the effects of litho and etch are more critical because of the 1:1 reproduction of features on the mask. Also, to keep the imprint mask cost low, simpler processes are preferred. The proposed technique uses grayscale lithography to reduce the microloading effect. The proposed process is modeling intensive but repeatable and requires no extra process steps.

S. Sassine, Yu. Krupko, Z.D. Kvon, J.C. Portal, R. Murali, K.P. Martin, G. Hill and A.D. Wieck, “Polarized-microwave control of directed transport in a 2D electron gas with artificial symmetrical scatterers,” Physica E 40, 2043 (2008).

The directed electron transport, driven by external linear-polarized microwave irradiation, in a two-dimensional spatially periodic asymmetrical system called “ratchet” has been studied experimentally. The broken spatial symmetry was introduced in a high mobility two-dimensional electron gas based on AlGaAs/GaAs heterojunction by patterning an array of artificial semidiscs-shaped scatterers (antidots). A directed electric current of few μA was observed in the “ratchet” antidot lattice under microwave irradiation (of few μW) in the absence of any external current applied to the sample. The signal was recorded as a function of magnetic field, temperature, microwave power and polarization.

S. Sassine, Yu. Krupko, J.C. Portal, Z.D. Kvon, R. Murali, K.P. Martin, G. Hill and A.D. Wieck, “Experimental investigation of the ratchet effect in a two-dimensional electron system with broken spatial inversion symmetry,” Phys. Rev. B 78, 045431 (2008).

We report on the experimental evidence of directed electron transport, induced by external linear-polarized microwave irradiation, in a two-dimensional spatially periodic asymmetrical system called “ratchet.” The broken spatial symmetry was introduced in a high mobility two-dimensional electron gas (2DEG) based on AlGaAs/GaAs heterojunction by patterning an array of artificial semidisks-shaped antidots. We show that the direction of the transport is efficiently changed by the microwave polarization. The dependence of the effect on magnetic field and temperature is investigated. This represents a significant step toward the realization of microwave detectors and current generators.

R. Murali, J.D. Meindl, “Modeling the Effect of Source/Drain Junction Depth on Bulk MOSFET Scaling,” Solid State Electronics, vol. 51, no. 6, pp. 823-827, June 2007.

Accurate threshold voltage (V_T) modeling of bulk-MOSFETs is important for device optimization and circuit simulation. Existing V_T models cannot model the impact of source/drain junction depth on V_T rolloff. A new model is proposed that can accurately model bulk-MOSFET V_T including the source/drain junction depth. The model also provides a scale-length that can be used to rapidly predict the minimum channel-length for a given set of technology parameters.

R. Murali, D.K. Brown, K.P. Martin, J.D. Meindl, “Improving electron beam resist sensitivity by preexposure to deep ultraviolet radiation,” Journal of Vacuum Science and Technology B, vol. 25, no. 6, pp. 2064-2067, Dec. 2007.

Electron beam lithography, when combined with optical lithography, is a promising approach to obtain good throughput. A bottleneck for this is resist sensitivity and the concomitant shot-noise limit for resolution. It is possible to obtain increased sensitivity without reducing resolution by preexposing electron beam resist to deep ultraviolet radiation before electron beam patterning. Results show that up to a 30% reduction in required dosage is obtained with this method; the associated trade off in dissolution of unexposed areas and critical dimension sensitivity is minimal. Resolution is also maintained and sub-50 nm lines with good aspect ratio have been demonstrated.

R. Murali, “Metrology for Grayscale Lithography,” Proceedings of the International Conference on Frontiers of Characterization and Metrology for Nanoelectronics, pp. 419-22, American Institute of Physics, Sept. 2007.

Three dimensional microstructures find applications in diffractive optical elements, photonic elements, etc. and can be efficiently fabricated by grayscale lithography. Good process control is important for achieving the desired structures. Metrology methods for grayscale lithography are discussed. Process optimization for grayscale e-beam lithography is explored and various process parameters that affect the grayscale process are discussed.

R. Murali, D.K. Brown, K.P. Martin, J.D. Meindl, “Process Optimization and Proximity Effect Correction for Grayscale E-beam Lithography,” Journal of Vacuum Science and Technology B, vol. 24, no. 6, pp. 2936-2939, Dec. 2006.

Three-dimensional microstructures find applications in diffractive optical elements, photonic elements, etc., and can be efficiently fabricated by e-beam lithography. Good process control and efficient proximity effect correction are important for achieving the desired structures. With polymethylmethacrylate as the resist, a process optimization of different develop conditions is carried out to identify a process that is most conductive to gray scale features. A novel proximity effect correction scheme called effective dose-depth (EDD) method is proposed. Using the EDD method for grating design and the optimized process, blazed gratings have been fabricated with excellent uniformity and low surface roughness.

R. Murali, B. L. Austin, L, Wang, and J. D. Meindl, “Short Channel Modeling of Bulk Accumulation MOSFETs,” IEEE Transactions on Electron Devices, vol. 51, no. 6, pp. 940-947, June 2004.

Physically based short-channel effect (SCE) models are derived for bulk accumulation MOSFETs. Using the proposed models, threshold voltage rolloff, subthreshold swing, and subthreshold current can be accurately calculated; this enables physical insights into device scaling behavior, and prediction of scaling limits. The models enable optimization of accumulation MOSFETs, resulting in small SCE, and low process sensitivity. The models are equally applicable to inversion MOSFETs, and allow easy comparison between accumulation and inversion MOSFETs. Novel application areas of accumulation MOSFETs are identified where they perform better than inversion MOSFETs (better on-current and lower SCE for a given off-current). With mid-band metal gate, accumulation MOSFETs perform better than inversion MOSFETs in ultra low power applications. For poly gate CMOS, accumulation MOSFETs perform better than inversion MOSFETs in low standby power applications.

Conferences with Proceedings

R. Murali, “Mitigation of Microloading Effect in Nanoimprint Mask Fabrication,” Proceedings of the Electron, Ion, Photon Beam and Nanotechnology Conference, May 2008, Portland, OR.

W.A. de Heer, C. Berger, E. Conrad, P. First, R. Murali, and J.D. Meindl, “Pionics: the Emerging Science and Technology of Graphene-based Nanoelectronics,” IEDM Technical Digest, 2007, pp. 199-202.

Extremely thin extend layers of graphene are readily grown epitaxially on single crystal silicon carbide surfaces. This material can be patterned using microelectronics lithography methods to produce all-graphene interconnected device structures. The current status of this new field of electronics is presented including the properties of several patterned devices like Hall bars and top and side gated FETs. The important role of pi electrons and their non-conventional properties of this electronic material warrants the designation of pionics for this new field of graphene-based electronics.

R. Murali, and J.D. Meindl, “Modeling Process Variations Using a Compact Model,” Proceedings of the Workshop on Compact Modeling, May 2007, Santa Clara, CA.

Inclusion of manufacturing variations has become an important part of static timing analysis. Existing statistical timing analysis methods involve the use of time-consuming circuit simulations or use fit polynomials. Previous efforts at modeling parameter variations have yielded equations that are not closed-form and might require numerical solutions. In this work a compact model is derived to predict the effect of manufacturing variations on the delay distribution of circuits. The model is physics-based, shows excellent match with simulations, and is valid over a wide range of device parameters. The model can be used to rapidly assess the impact of various circuit and device parameters on delay variation and thus is a useful tool for design-for manufacturing (DFM) as well as design space exploration.

R. Murali, E. Walters, F. Zaman, C. Tabor, W. Huang, M. El-Sayed, and J.D. Meindl, “Fabrication of Bowtie Nano-Gap Structures by Electron Beam Lithography,” Proceedings of Nanotech 2007, May 2007, Santa Clara, CA.

Metallic nano-particle pairs in close proximity to one another display surface-enhanced raman scattering (SERS). Single-molecule detection has been predicted to be possible thanks to SERS. The SERS enhancement is due an induced localized electric field at the particle’s surface caused by a localized surface plasmon resonance (LSPR). The local field can be maximized by simultaneously increasing the curvature of the particles and bringing them into close proximity to one another (particle gaps less than the particle size) [1-2]. The field intensity has been predicted to drop exponentially as the gap size is increases, and hence study of small gaps (1-20 nm) is crucial to achieving single-molecule detection. Chemical identification of hazardous substances such as Cyanide and Anthrax is then possible on an extremely small concentration level, bordering on single molecule detection. Other studies To-date, no work has been reported in the literature on the fabrication of structures with high curvature and small gaps. This work presents the fabrication of such structures using an optimized process and uses electron-beam lithography. Sub-5 nm gaps have been demonstrated.

G. Lopez, R. Murali, R. Sarvari, K. Bowman, J. Davis, and J.D. Meindl, “The Impact of Size Effects and Copper Interconnect Process Variations on the Maximum Critical Path Delay of Single and Multi-Core Microprocessors,” Proceedings of the International Interconnect Technology Conference, June 2007, San Francisco, CA.

We present a new closed-form compact model for conductor resistivity considering size effects, line-edge roughness and CMP dishing. Using this model, Monte Carlo simulations quantify the impact of interconnect variations on maximum critical path delay distributions for future technologies. Results indicate LER amplitudes start to become a substantial percentage of the nominal effective line-width dimension (2016 to 2020), leading to an increase in the conductor resistivity. Moreover, multi-core systems exhibit better tolerance to interconnect variations due to their short-wire architecture - as much as a 35% reduction for the maximum critical path delay mean degradation and standard deviation is observed for the year 2020 with a 14 nm half-pitch.

R. Murali, D. Brown, K. Martin, and J.D. Meindl, “Increased Sensitivity of Positive E-beam Resist by Pre-exposure to DUV radiation,” Proceedings of the Electron, Ion, Photon Beam and Nanotechnology Conference, May 2007, Denver, CO.

R. Murali, “Metrology Needs for Grayscale Lithography,” International Conference on Frontiers of Characterization and Metrology for Nanoelectronics, March 2007, Gaithersburg, MD.

S. Sassine, Y. Krupko, Z.D. Kvin, J.-C. Portal, R. Murali, K. Martin, G. Heill, and A.D. Wieck, “Polarized-microwave control of directed transport in a 2D electron gas with artificial asymmetrical scatterers,” Proceedings of the International Conference on Electronic Properties of Two-dimensional Systems and Modulated Semiconductor Structures 2007.

R. Murali, D.K. Brown, K.P. Martin, J.D. Meindl, “Process Optimization and Proximity Effect Correction for Grayscale E-beam Lithography,” Proceedings of the Electron Ion Photon Beam Technology and Nanofabrication Conference, 2006, pp. 340-341.

Q. Chen, L. Wang, R. Murali, and J. D. Meindl, “Compact, Physics-based Modeling of Nanoscale Limits of Double-Gate MOSFETs,” invited paper, Proceedings of the Workshop on Compact Modeling, Boston, MA, May 2004.

Compact, physics-based models of subthreshold swing and threshold voltage are presented for double-gate (DG) MOSFETs in symmetric, asymmetric, and ground-plane modes. Applying these device models, threshold voltage variations in DG MOSFETs are comprehensively and exhaustively investigated using a unique, scale-length based methodology. Quantum mechanical effects and fringeinduced barrier lowering effect on threshold voltage, caused by ultra-thin silicon film and potential use of highpermittivity gate dielectrics, respectively, have been analytically modeled giving close agreement to numerical simulations. Scaling limits projections indicate that individual DG MOSFETs with good turn-off behavior are feasible at 10 nm scale; however, practical exploitation of these devices toward gigascale integrated systems requires development of novel technologies for significant improvement in process control.

L. Wang, Q. Chen, R. Murali, and J. D. Meindl, “Quantum Mechanical Effects on CMOS SOC Performance,” IEEE International ASIC/SOC Conference, 2003, pp. 109-112.

Comprehensively quantum mechanical effects and their impact on SOC CMOS logic circuit performance are studied, based on novel compact physical models. Significant performance degradation and power dissipation increase due to quantum mechanical effects are demonstrated in sub-100nm technologies. Specifically, 39% and 41% increase in power dissipation and device area, respectively, due to quantum effects compared with classical performance, are projected for the 25 nm technology generation. The results show that quantum effects will become a key constraint on circuit performance in future SOC technology generations.

R. Murali, L. Wang, B. L. Austin, and J. D. Meindl, “Scaled Accumulation FETs for Ultra-low power logic,” Proceedings of the IEEE International ASIC/SOC Conference, 2002, pp. 371-375.

R. Murali, L. Wang, B. L. Austin, and J. D. Meindl, “Low-power circuit advantages of the scaled accumulation FET,” IEEE International Symposium on Circuits and Systems, 2002, Vol. 5, pp. 201-204.

R. Murali, B. L. Austin, and J. D. Meindl, “A tick based methodology for rapid predictive circuit modeling,” IEEE International Symposium on Circuits and Systems, 2002, Vol. 3, pp. 791 -794.

Book Chapters

R. Murali, “Nanolithography” a chapter in Nano-Bio-Fluidic MEMS, Edited by P. Hesketh, Springer-Verlag, 2007.

Direct-write electron beam lithography (EBL) has emerged as a key lithographic technique to fabricate nanometer structures. EBL has a resolution down to a few nanometer and does need a mask. A wide variety of EBL machines are available depending on the application: mask making machines, direct-write tools, SEMs fitted with a pattern generator, and R&D machines. This chapter presents topics of interest to a reader involved in fabricating Bio-Nano-Fluidic MEMS devices and systems. CAD file preparation and machine design basics are briefly reviewed. Resist technology and proximity effect is discussed in detail since they have a major impact on the e-beam lithography process. Other lithographic methods including laser, X-ray, Ion-beam, electron projection, and AFM-based methods are also discussed.

R. Murali, “Fabrication of 3-D Microstructures,” a chapter in the NNIN Open Textbook, 2007.

Three dimensional microstructures find applications in diffractive optical elements,photonic elements, etc. and can be efficiently fabricated by grayscale lithography. Good process control is important for achieving the desired structures. In this supplemental section, metrology methods for grayscale lithography are discussed. Process optimization for grayscale e-beam lithography is explored and various process parameters that affect the grayscale process are discussed.